Scope of ASHES
As in previous years, ASHES 2023 welcomes submissions on any aspect of hardware security, concerning both theory and practice.
This includes, but is not limited to:
- Fault injection and countermeasures
- Side channels and countermeasures
- Hardware Trojans and countermeasures
- Tamper sensing and tamper protection
- New physical attack vectors or methods
- Secure sensors and sensor networks
- Device fingerprinting and hardware forensics
- Emerging computing technologies in security
- Lightweight hardware solutions
- Secure implementation and secure design of cryptographic and security primitives
- Security analyses and security proofs for implementations and primitives
- Security of reconfigurable and adaptive hardware
- Post-quantum security
- New designs and materials in hardware security
- Nanophysics and nanotechnology in hardware security (“nano-security”)
- Physical unclonable functions and new/emerging variants thereof
- Unforgeable item tagging, secure supply chains, and hardware-based countermeasures against product piracy
- Efficient hardware implementation of cryptographic primitives
- Scalable hardware solutions for large numbers of players/endpoints
- Hardware security and machine learning: Secure hardware implementations of machine learning algorithms, machine learning in side channel attacks, etc.
- Hardware security in emerging application scenarios: Internet of Things, smart home, automotive and autonomous systems, wearable computing, pervasive and ubiquitous computing, etc.
- (Physical) information leakage in the cloud
- Electronic voting machines
- Physical layer and wireless network security
- Anti-forensic attacks and protection (e.g., hardware virtualization and anti-forensic resilient memory acquisition)
- Architectural factors in hardware security, isolation versus encryption
- Secure hardware for multiparty computation
- Secure hardware in intellectual property and content protection
- Integration of hardware root of trust, such as random number generators and PUFs
- Quality metrics for secure hardware
- Conformance and evaluation of secure hardware
- Formal treatments, proofs, standardization, or categorization of hardware-related techniques (incl. surveys and systematization of knowledge papers)
To account for the special nature of hardware security as a rapidly developing discipline, the workshop offers four different categories of papers:
- Full papers, with up to 10 pages in ACM double column format (including references, but excluding appendices; length of appendices see below).
- Short papers, with up to 6 pages in ACM double column format (including references, but excluding appendices; length of appendices see below)
- Wild and crazy (WaC) papers, with 3 to 8 pages in ACM double column format (including references, but excluding appendices; length of appendices see below). WaC papers are meant to target groundbreaking new methods and paradigms for hardware security. Their focus lies on novelty and potential impact, and on the plausibility of their argumentation, but not on a full demonstration or complete implementation of their ideas. They are reviewed and assessed as such. Wild and crazy papers must bear the prefix “WaC:” in their title from the submission onwards.
- Systematization of knowledge (SoK) papers, with up to 12 pages in ACM double column format (including references, but excluding appendices; length of appendices see below). SoK papers shall evaluate, systematize, and contextualize existing knowledge. They should serve the community by fostering and structuring the development of a particular subarea within hardware security. Ideally, but not necessarily, they might provide a new view on an established, important subarea, support or challenge long-standing beliefs with compelling evidence, or present a convincing new taxonomy. They will be reviewed and assessed accordingly. Systematization of knowledge papers must bear the prefix “SoK:” in the title from the submission onwards.
- Appendices in all paper categories: Since 2020, we allow arbitrarily long appendices in all paper categories, if authors consider this necessary to provide additional information or supplementary material for their works. In case of excessive length, reviewers may skip parts of the appendices, or study them less intensely. In the camera-ready versions, the length of the appendices must be condensed to at most three pages (working with weblinks to code/data repositories where necessary).
- Paper submission deadline:
June 25, 2023, 23:59:59 EDT July 16, 2023, 23:59:59 EDT
July 30, 2023, 23:59:59 EDT (firm deadline!)
- Acceptance notification:
August 05, 2020August 31, 2020
- Camera-ready deadline: September 05, 2023
Conflicts of Interest
A paper author has a conflict of interest with a PC member if and only if one or more of the following conditions holds:
- The PC member is a co-author of the paper.
- The PC member has been a co-worker in the same company or university within the past two years.
- The PC member has been a collaborator within the past two years.
- The PC member is or was the author’s primary thesis advisor, no matter how long ago.
- The author is or was the PC member’s primary thesis advisor, no matter how long ago.
- The PC member is a relative or close personal friend of the author.
All paper authors are responsible to reveal any existing conflicts of interest, ideally at submission time, and at the very latest until the submission closing. They should jointly write an e-mail message to the two program chairs, Lejla Batina (firstname.lastname@example.org) and Domenic Forte (email@example.com), listing all conflicts of interests of all authors (if there are any). Papers with incorrect or incomplete conflict of interest information as of the submission closing time risk rejection.
Call for Papers in PDF Format
The call for papers can be downloaded as a flyer in PDF format here.